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This document describes the One SDK design, including the development environment. One SDK is part of the "One" vision where the current GUIs, SDKs and EVMs across BMS are integrated into a common framework to promote cross-selling.
1.1 Stacked EVM
The "One" vision concept starts with a Stacked EVM that contains one motherboard and several daughter boards. The motherboard communicates to PC host over a USB connection, and can have zero or more daughterboards stacked on top of it through two 20-pin vertical bus connectors. Each daughterboard can support one or more BMS devices.
The motherboard USB is a J-Link port which is used for debugging firmware running on the motherboard RA MCU as well as for the serial communication based on J-Link RTT. The J-Link Remote Server allows host application (e.g., One GUI) to perform typical debug actions such as setting breakpoints, communicating to the target using RTT.
1.2
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2.1 Install prerequisites
- Install e2studio/FSP for RA
- Install Python needed to support MCUBoot
- Install Segger J-Link Software and Documentation
2.2 Introduction to Trust Zone
- Secure after POR
- Bootloader Set up S, NS and NSC memories
- Describe S+NS side-by-side development model
- Describe Secure Bundle distribution model
- How to place "secret sauce" in secure memory
- How to call S code from NS code
- How to call NS code from S code
2.3 Create your first "Blinky" project
- S and NS co-reside in the same workspace
- Create Secure Project (S) - add Bootloader to set up S, NS and NSC memory map
- Show where S calls into NS code
- Create Non-secure Project (NS) - add FreeRTOS
- Build and Run
- Show the S to NS code flow to end up blinking LEDs
- Show where to find the *.sbd file
3.0 SDK Architecture
One GUI
The PC application is One GUI. It communicates with the motherboard and all the daughterboards present on the motherboard. In concept, One GUI has a main page that shows the system view, as well as individual pages providing register access of each detected devices.
1.3 One SDK
One SDK forms the building blocks of MCU firmware for BMS devices, and is the main focus on this design document. It combines PDC Library and FG functionality such that the same firmware can support any combination of the following functions:
- Type-C Port Manager (TCPM)
- Fuel Gauge (FG)
- Motherboard Controller (MC)
TCPM typically works with a Type-C Port Controller (TPCP) to support USB-PD power negotiation up to 48V@5A. FG typically works with an AFE (aka BMIC) to provide battery monitoring. In both cases, the MCU+AFE combination can be a chipset, or fully encased in the same IC (i.e., co-pack).
The main objectives of One SDK are:
- Protect and monetize Firmware IP
- Faster time-to-market
- Reduce solution cost
One SDK must protect the Firmware IP such as FG algorithm and TCPM. The protection will come from hardware security such as ARM Trust Zone or from software security such as encryption. One SDK can also support faster time-to-market by combining FG and TCPM with other value-add firmware features, such as CAN and Bluetooth by pairing the firmware with Renesas MCUs that has the required hardware peripherals.
1.3.3 Reduce solution cost
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2.0 One SDK Architecture
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.1 Overview
One SDK model consists of four layers plus a RTOS:
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- Introduction
- Pseudo code of motherboard application stack
- Security
- Communication - RTT requires RA4E1 board modification
- Algorithm API - include daughter card detection
- AFE API - multi-daughter cards
2.0 Setup development environment
2.1 Install prerequisites
- Install e2studio/FSP for RA
- Install Python needed to support MCUBoot
- Install Segger J-Link Software and Documentation
2.2 Introduction to Trust Zone
- Secure after POR
- Bootloader Set up S, NS and NSC memories
- Describe S+NS side-by-side development model
- Describe Secure Bundle distribution model
- How to place "secret sauce" in secure memory
- How to call S code from NS code
- How to call NS code from S code
2.3 Create your first "Blinky" project
- S and NS co-reside in the same workspace
- Create Secure Project (S) - add Bootloader to set up S, NS and NSC memory map
- Show where S calls into NS code
- Create Non-secure Project (NS) - add FreeRTOS
- Build and Run
- Show the S to NS code flow to end up blinking LEDs
- Show where to find the *.sbd file
6.0 References
- RA Flexible Software Package Users Manual
- Security Design with ARM Trust Zone using Cortex M33
- Renesas Device Life Cycle Management Key Injection
- RA4E1 device data sheet
- Segger J-Link RTT
- J-Link Telnet Interface
- J-Link SDK
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