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Change switches as per below.
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Change switches as per below. Note that board version 3 (Rev C) or later must be used.
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Change switches as per below. Note that board rev. 3 or later must be used.
Tigrad Tigard Switch Setting
If you are using a TigradTigard, set the TARGET switch to 1v8
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To build OpenOCD you can use this script found in the https://github.com/renesas-rz/rzg_openocd repository.
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/build_openocd.sh
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0001-tcl-target-renesas_rz_g2-Rename-to-renesas_rz-and-ad.patch
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0002-target-aarch64-MRS-MSR-support-for-system-register-a.patch
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0003-target-aarch64-enable-disable-mmu-new-commands.patch
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0004-target-aarch64-Add-code-to-invaldate-the-instruction.patch
$ wget https://raw.githubusercontent.com/renesas-rz/rzg_openocd/master/0005-tcl-target-renesas_rz-add-hwthread-and-coreid.patch
$ chmod +x ./build_openocd.sh
$ export GIT_SSL_NO_VERIFY=1 # Avoid GIT error: server certificate verification failed
$ ./build_openocd.sh
Or manually follow the steps in that script:
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Example to run OpenOCD and attach to a RZ/G2L device using a Tigrad Tigard JTAG adapter:
$ cd installdir $ sudo bin/openocd -f share/openocd/scripts/interface/ftdi/tigard.cfg -c "set SOC G2L" -f share/openocd/scripts/target/renesas_rz.cfg
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Open On-Chip Debugger 0.12.0+dev-01565-g5622ada82 (2024-04-10-13:59) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html G2L G2L - 0 CA57(s), 2 CA55(s), 0 CA53(s), 0 CR7(s), 1 CM33(s) Boot Core - CA55 r9a07g044l.cpu SMP targets: r9a07g044l.a55.0 r9a07g044l.a55.1 init_reset Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections Info : J-Link Lite V10 compiled Jan 30 2023 11:28:07 Info : Hardware version: 10.10 Info : VTarget = 1.761 V Info : clock speed 4000 kHz Info : JTAG tap: r9a07g044l.cpu tap/device found: 0x6ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x6) Info : r9a07g044l.a55.0: hardware has 6 breakpoints, 4 watchpoints Info : r9a07g044l.a55.0 cluster 0 core 0 multi core
Info : [r9a07g044l.a55.0] Examination succeed
Info : [r9a07g044l.axi_ap] Examination succeed Info : starting gdb server for r9a07g044l.a55.0 on 3333 Info : Listening on port 3333 for gdb connections Info : starting gdb server for r9a07g044l.m33 on 3334 Info : Listening on port 3334 for gdb connections Info : gdb port disabled
Open On-Chip Debugger 0.11.0+dev-00663-gd1e14abdb-dirty (2022-05-10-07:54)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
r9A07g043u.cpu
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Info :
Listening on port 6666 for tcl connections
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Info : Listening on port 4444 for telnet connections
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Info : J-Link Lite V9 compiled Feb 2 2021 16:32:48
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Info : Hardware version: 9.00
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Info : VTarget = 1.819 V
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Info : clock speed 4000 kHz
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Info : JTAG tap: r9A07g043u.cpu tap/device found: 0x1000563d (mfg: 0x31e (Andes Technology Corporation), part: 0x0005, ver: 0x1)
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Info : datacount=4 progbufsize=8
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Info : Examined RISC-V core; found 1 harts
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Info : hart 0: XLEN=64, misa=0x800000000094312d
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Info : starting gdb server for r9A07g043u.cpu on 3333
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Info : Listening on port 3333 for gdb connections
Note that the "DAP transaction stalled" messages are normal and do not affect the functionality.
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